ListarICC_Congressos i conferències por tema "high performance computing"
Mostrando ítems 1-2 de 2
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Balanced and Compressed Coordinate Layout for the Sparse Matrix-Vector Product on GPUs
Springer (2021)We contribute to the optimization of the sparse matrix-vector product on graphics processing units by introducing a variant of the coordinate sparse matrix layout that compresses the integer representation of the matrix ... -
Tuning stationary iterative solvers for fault resilience
ACM. Association for Computing Machinery (2015)As the transistor’s feature size decreases following Moore’s Law, hardware will become more prone to permanent, intermittent, and transient errors, increasing the number of failures experienced by applications, and ...