Actuator Fault Tolerant Control Proposal for PI Controlled SISO Systems
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Otros documentos de la autoría: Peñarrocha-Alós, Ignacio; Sales-Setién, Ester; Tena, David
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Mostrar el registro completo del ítemcomunitat-uji-handle:10234/9
comunitat-uji-handle2:10234/7034
comunitat-uji-handle3:10234/67820
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Título
Actuator Fault Tolerant Control Proposal for PI Controlled SISO SystemsFecha de publicación
2018-08-29Editor
Elsevier; IFAC (International Federation of Automatic Control)Cita bibliográfica
PEÑARROCHA-ALÓS, Ignacio; SALES-SETIÉN, Ester; TENA, David. Actuator Fault Tolerant Control Proposal for PI Controlled SISO Systems. IFAC-PapersOnLine, 2018, vol. 51, no 24, p. 680-687.Tipo de documento
info:eu-repo/semantics/conferenceObjectVersión de la editorial
https://www.sciencedirect.com/science/article/pii/S2405896318323619Versión
info:eu-repo/semantics/publishedVersionPalabras clave / Materias
Resumen
In this work, we develop a control structure which can be added to an existing closed loop in order to mitigate the effect of actuator faults. We analyze the initial performance of the closed loop in terms of robustness ... [+]
In this work, we develop a control structure which can be added to an existing closed loop in order to mitigate the effect of actuator faults. We analyze the initial performance of the closed loop in terms of robustness and time response under references, faults and measurement noises. In the design of the proposed active fault tolerant control structure, we keep the initial robustness and time response to references. At the same time, we try to improve some performance indices under faults at the cost of a higher control action activity caused by the measurement noises that affect the system. The design of the controller depends on a unique parameter so it can be easily understood. We show that although the response under step faults becomes oscillatory, the active fault tolerant structure reduces the integral of the absolute value of the tracking error under step faults and it attenuates the effect of ramp faults in steady state. Several examples show the goodness and drawbacks of the approach and show some aspects to be considered in the design. [-]
Descripción
Comunicació presentada a SAFEPROCESS 2018. 10th IFAC Symposium on Fault Detection, Supervision and Safety for Technical Processes (Warsaw, Poland, 29–31 August 2018)
Publicado en
10th IFAC Symposium on Fault Detection, Supervision and Safety for Technical Processes SAFEPROCESS 2018: Warsaw, Poland, 29–31 August 2018 / Edited by Silvio Simani, Krzysztof PatanProyecto de investigación
MECD (grant FPU14/01592); Universitat Jaume I de Castelló (projects P11B2015-42) ; MINECO (project TEC2015-69155-R)Derechos de acceso
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