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Energy Balance between Voltage-Frequency Scaling and Resilience for Linear Algebra Routines on Low-Power Multicore Architectures
dc.contributor.author | Catalán, Sandra | |
dc.contributor.author | Herrero, José R. | |
dc.contributor.author | Quintana-Orti, Enrique S. | |
dc.contributor.author | Rodríguez Sánchez, Rafael | |
dc.date.accessioned | 2018-06-07T11:21:45Z | |
dc.date.available | 2018-06-07T11:21:45Z | |
dc.date.issued | 2018 | |
dc.identifier.issn | 0167-8191 | |
dc.identifier.uri | http://hdl.handle.net/10234/175023 | |
dc.description.abstract | Near Threshold Voltage (NTV) computing has been recently proposed as a technique to save energy, at the cost of incurring higher error rates including, among others, Silent Data Corruption (SDC). In this paper, we evaluate the energy efficiency of dense linear algebra routines using several low-power multicore processors and we analyze whether the poten- tial energy reduction achieved when scaling the processor to operate at a low voltage com- pensates the cost of integrating a fault tolerance mechanism that tackles SDC. Our study targets algorithmic-based fault-tolerant versions of the dense matrix-vector and matrix(- matrix) multiplication kernels (gemv and gemm, respectively), using the BLIS framework, as well as an implementation of the LU factorization with partial pivoting built on top of gemm. Furthermore, we tailor the study for a number of representative 32-bit and 64-bit multicore processors from ARM that were specifically designed for energy efficiency. | ca_CA |
dc.format.extent | 12 p. | ca_CA |
dc.language.iso | eng | ca_CA |
dc.publisher | Elsevier | ca_CA |
dc.relation.isPartOf | Parallel Computing, Volume 73, April 2018, | ca_CA |
dc.rights | 0167-8191/© 2017 Elsevier B.V. All rights reserved. | ca_CA |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | * |
dc.subject | Energy efficiency | ca_CA |
dc.subject | Voltage-frequency scaling | ca_CA |
dc.subject | Fault tolerance | ca_CA |
dc.subject | Dense linear algebra | ca_CA |
dc.subject | High performance | ca_CA |
dc.subject | Multicore processors | ca_CA |
dc.title | Energy Balance between Voltage-Frequency Scaling and Resilience for Linear Algebra Routines on Low-Power Multicore Architectures | ca_CA |
dc.type | info:eu-repo/semantics/article | ca_CA |
dc.identifier.doi | http://dx.doi.org/10.1016/j.parco.2017.05.004 | |
dc.relation.projectID | CICYT TIN2014-53495-R ; TIN2015-65316-P ; 2014 SGR 1051 | ca_CA |
dc.rights.accessRights | info:eu-repo/semantics/restrictedAccess | ca_CA |
dc.relation.publisherVersion | https://www.sciencedirect.com/science/article/pii/S0167819117300765 | ca_CA |
dc.type.version | info:eu-repo/semantics/publishedVersion | ca_CA |
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