Buscar
An Efficient Implementation of Parallel Parametric HRTF Models for Binaural Sound Synthesis in Mobile Multimedia
(IEEE, 2020-02-09)
The extended use of mobile multimedia devices in applications like gaming, 3D video and audio reproduction, immersive teleconferencing, or virtual and augmented reality, is demanding efficient algorithms and methodologies. ...
Multicore implementation of a multichannel parallel graphic equalizer
(Springer, 2022-04-22)
Numerous signal processing applications are emerging on mobile computing systems. These applications are subject to responsiveness constraints for user interactivity and, at the same time, must be optimized for energy ...
Evaluating the computational performance of the Xilinx Ultrascale plus EG Heterogeneous MPSoC
(Springer, 2020-06-06)
The emergent technology of Multi-Processor System-on-Chip (MPSoC), which combines heterogeneous computing with the high performance of Field Programmable Gate Arrays (FPGAs) is a very interesting platform for a huge number ...
A Parallel Approach to HRTF Approximation and Interpolation Based on a Parametric Filter Model
(Institute of Electrical and Electronics Engineers (IEEE), 2017-10)
Spatial audio-rendering techniques using head-related transfer functions (HRTFs) are currently used in many different contexts such as immersive teleconferencing systems, gaming, or 3-D audio reproduction. Since all these ...
GPU-based Dynamic Wave Field Synthesis using Fractional Delay Filters and Room Compensation
(IEEE, 2017-02)
Wave Field Synthesis (WFS) is a multichannel audio reproduction method, of a considerable computational
cost that renders an accurate spatial sound field using a large number of loudspeakers to emulate
virtual sound ...
GPU acceleration of a non-standard finite element mesh truncation technique for electromagnetics
(IEEE, 2020-05-07)
The emergence of General Purpose Graphics Processing Units (GPGPUs) provides new opportunities to accelerate applications involving a large number of regular computations. However, properly leveraging the computational ...
Reliability Evaluation of LU Decomposition on GPU-Accelerated System-on-Chip Under Proton Irradiation
(IEEE, 2022-03-22)
Graphic processing units (GPUs) have become a basic accelerator both in high-performance nodes and low-power system-on-chip (SoC). They provide massive data parallelism and very high performance per watt. However, their ...
Strategies to parallelize a finite element mesh truncation technique on multi-core and many-core architectures
(Springer, 2022-12-02)
Achieving maximum parallel performance on multi-core CPUs and many-core GPUs is a challenging task depending on multiple factors. These include, for example, the number and granularity of the computations or the use of the ...
On the performance of a GPU-based SoC in a distributed spatial audio system
(Springer, 2021-01-04)
Many current system-on-chip (SoC) devices are composed of low-power multicore processors combined with a small graphics accelerator (or GPU) offering a trade-off between computational capacity and low-power consumption. ...
Evaluating the soft error sensitivity of a GPU-based SoC for matrixmultiplication
(Elsevier, 2020)
System-on-Chip (SoC) devices can be composed of low-power multicore processors combined with a small graphics accelerator
(or GPU) which offers a trade-off between computational capacity and low-power consumption. In this ...