Scheduling algorithms-by-blocks on small clusters
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Other documents of the author: Igual, Francisco; Quintana-Ortí, Gregorio; Van de Geijn, Robert A.
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comunitat-uji-handle3:10234/8620
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http://dx.doi.org/10.1002/cpe.2842 |
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Scheduling algorithms-by-blocks on small clustersDate
2012-03-28Publisher
WileyISSN
1532-0626; 1532-0634Bibliographic citation
IGUAL, Francisco D.; QUINTANA‐ORTÍ, Gregorio; GEIJN, Robert. Scheduling algorithms‐by‐blocks on small clusters. Concurrency and Computation: Practice and Experience, 2013, vol. 25, no 3, p. 367-384Type
info:eu-repo/semantics/articlePublisher version
http://onlinelibrary.wiley.com/doi/10.1002/cpe.2842/abstractAbstract
The arrival of multicore architectures has generated an interest in reformulating dense matrix computations as algorithms-by-blocks, where submatrices are units of data and computations with those blocks are units of ... [+]
The arrival of multicore architectures has generated an interest in reformulating dense matrix computations as algorithms-by-blocks, where submatrices are units of data and computations with those blocks are units of computation. Rather than directly executing such an algorithm, a directed acyclic graph is generated at runtime that is then scheduled by a runtime system such as SuperMatrix. The benefit is a clear separation of concerns between the library and the heuristics for scheduling. In this paper, we show that this approach can be taken one step further using the same methodology and an ad hoc runtime to map algorithms-by-blocks to small clusters. With no change to the library code, and the application that uses it, the computational power of such small clusters can be utilized. An impressive performance on a number of small clusters is reported. As a proof of the flexibility of the solution, we report performance results on accelerated clusters based on graphics processors. We believe this to be a possible step towards programming many-core architectures, as demonstrated by a port of the solution to Intel's Single-chip Cloud Computer (Intel, Santa Clara, CA, USA). Copyright © 2012 John Wiley & Sons, Ltd. [-]
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Concurrency and Computation: Practice and Experience, 2013, vol. 25, no 3Rights
Copyright © 2012 John Wiley & Sons, Ltd.
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