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dc.contributor.authorMaciá-Lillo, Antonio
dc.contributor.authorBarrachina Mir, Sergio
dc.contributor.authorFabregat Llueca, German
dc.contributor.authorDolz, Manuel F.
dc.date.accessioned2024-05-13T10:33:59Z
dc.date.available2024-05-13T10:33:59Z
dc.date.issued2024-04-30
dc.identifier.citationMaciá, A., Barrachina Mir, S., Fabregat Llueca, G., & Dolz, M. F. (2024). “Optimising Convolutions for Deep Learning Inference on ARM Cortex-M Processors”. in IEEE Internet of Things Journal. https://doi.org/10.1109/JIOT.2024.3395335ca_CA
dc.identifier.issn2327-4662
dc.identifier.urihttp://hdl.handle.net/10234/207311
dc.description.abstractWe perform a series of optimisations on the convolution operator within the ARM CMSIS-NN library to improve the performance of deep learning tasks on Arduino development boards equipped with ARM Cortex-M4 and M7 microcontrollers. To this end, we develop custom microkernels that efficiently handle the internal computations required by the convolution operator via the lowering approach and the direct method, and we design two techniques to avoid register spilling. We also take advantage of all the RAM on the Arduino boards by reusing it as a scratchpad for the convolution filters. The integration of these techniques into CMSIS-NN, when invoked by TensorFlow Lite for microcontrollers for quantised versions of VGG, SqueezeNet, ResNet, and MobileNet-like convolutional neural networks enhances the overall inference speed by a factor ranging from 1.13× to 1.50×.ca_CA
dc.description.sponsorShipFunding for open access charge: CRUE-Universitat Jaume I
dc.format.extent16 p.ca_CA
dc.format.mimetypeapplication/pdfca_CA
dc.language.isoengca_CA
dc.publisherInstitute of Electrical and Electronics Engineers Inc.ca_CA
dc.relation.isPartOfIEEE Internet of Things Journal, 2024ca_CA
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/ca_CA
dc.subjectARM Cortex-Mca_CA
dc.subjectCMSIS-NNca_CA
dc.subjectConvolutionca_CA
dc.subjectConvolution operatorca_CA
dc.subjectDeep learningca_CA
dc.subjectEdge computingca_CA
dc.subjectHigh performanceca_CA
dc.subjectInference algorithmsca_CA
dc.subjectMicrocontrollersca_CA
dc.subjectOptimizationca_CA
dc.subjectProgram processorsca_CA
dc.subjectRandom access memoryca_CA
dc.subjectRegistersca_CA
dc.subjectSignal processing algorithmsca_CA
dc.titleOptimising Convolutions for Deep Learning Inference On ARM Cortex-M Processorsca_CA
dc.typeinfo:eu-repo/semantics/articleca_CA
dc.identifier.doi10.1109/JIOT.2024.3395335
dc.rights.accessRightsinfo:eu-repo/semantics/openAccessca_CA
dc.relation.publisherVersionhttps://ieeexplore.ieee.org/document/10513367ca_CA
dc.type.versioninfo:eu-repo/semantics/publishedVersionca_CA
project.funder.nameEuropean Union NextGenerationEUca_CA
oaire.awardNumberTED2021-129334Bca_CA


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