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dc.contributor.authorAliaga Estellés, José Ignacio
dc.contributor.authorBarreda Vayá, Maria
dc.contributor.authorDufrechou, Ernesto
dc.contributor.authorEzzatti, Pablo
dc.contributor.authorQuintana-Orti, Enrique S.
dc.date.accessioned2016-05-06T13:30:08Z
dc.date.available2016-05-06T13:30:08Z
dc.date.issued2015-09
dc.identifier.issn1865-2034
dc.identifier.issn1865-2042
dc.identifier.urihttp://hdl.handle.net/10234/159370
dc.description.abstractWe analyze the efficiency of servers equipped with state-of-the-art general-purpose multicore processors as well as platforms based on accelerators such as graphics processing units (GPUs) and the Intel Xeon Phi. Following the proposal recently advocated in the High Performance Conjugate Gradient (HPCG) benchmark, we leverage for this purpose efficient implementations of ILUPACK, a preconditioned solver for sparse linear systems that comprises numerical kernels and data access patterns analogous to those of HPCG. Our study analyzes the (computational) performance and energy efficiency, with two different metrics for each: time/floating-point throughput for the former; and energy/floating-point throughput-per-Watt for the latter.ca_CA
dc.description.sponsorShipThis work was supported by the CICYT project TIN2011-23283 of MINECO and FEDER, and the EU Project FP7 318793 “EXA2GREEN”.
dc.format.extent8 p.ca_CA
dc.format.mimetypeapplication/pdfca_CA
dc.language.isoengca_CA
dc.publisherSpringer Berlin Heidelbergca_CA
dc.relation.isPartOfComputer Science - Research and Development, 2015, Special Issue Paperca_CA
dc.rights© Springer-Verlag Berlin Heidelberg 2015 © Springer International Publishing AG, Part of Springer Science+Business Media "The final publication is available at Springer via http://dx.doi.org/10.1007/s00450-015-0299-7"ca_CA
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/*
dc.subjectSparse linear algebraca_CA
dc.subjectPreconditioned iterative solversca_CA
dc.subjectILUPACKca_CA
dc.subjectEnergy efficiencyca_CA
dc.subjectMulticore processorsca_CA
dc.subjectHardware acceleratorsca_CA
dc.titleCharacterizing the efficiency of multicore and manycore processors for the solution of sparse linear systemsca_CA
dc.typeinfo:eu-repo/semantics/articleca_CA
dc.identifier.doihttp://dx.doi.org/10.1007/s00450-015-0299-7
dc.rights.accessRightsinfo:eu-repo/semantics/openAccessca_CA
dc.relation.publisherVersionhttp://link.springer.com/article/10.1007%2Fs00450-015-0299-7ca_CA


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